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A VHDL Synthesis Primer
Author: J. Bhasker
Cover: cover
List Price: $59.95
Published by Star Galaxy Publishing
Date Published: 08/1998
ISBN: 0965039196
 Summary
Here is a practical and useful guide to VHDL synthesis. The purpose of this book is to explain the transformations that occur during the synthesis process from a VHDL model to a netlist. Constructs that are supported for synthesis are clearly explained with many examples with their synthesized netlists. The second edition is based on the IEEE standard NUMERIC_BIT/NUMERIC_STD arithmetic packages.
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